BCM7038 High-Definition Video Graphics UMA Subsystem and Mixer with DVI sponsored by Broadcom Corporation
Description: The BCM7038 is an advanced dual channel HD video/audio/graphics and personal video recording (PVR) chip that enables manufacturers to economically incorporate high-quality HDTV capability and PVR features into digital televisions and cable set-top boxes. |  |
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Miss Univers sponsored by Adveda
Description:
Miss Univers is a complete HW/SW co-verification tool for multi-processor SOC architectures, offering extensive debug capabilities, fast simulation and emulation support.
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OR3LP26B FPSC sponsored by Lattice Semiconductor Corp.
Description: 33/50/66 MHz, 32-/64-bit, PCI Master/Target interface, fully compliant with Revision 2.2 of the PCI Local Bus specification. | |
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ORCA Download Cable sponsored by Lattice Semiconductor Corp.
Description: This one cable features both UNIX workstation and PC compatibility utilizing the serial COM ports. | |
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ORLI10G FPSC sponsored by Lattice Semiconductor Corp.
Description: The ORLI10G together with the PCS IP core provide the best 10 Gb Ethernet PCS functionality on the market today! | |
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ORT4622 FPSC sponsored by Lattice Semiconductor Corp.
Description: 4-channel 622 megabit-per-second (2.5 gbps when all 4 channels are used) full-duplex synchronous interface with built-in clock and data recovery (CDR) in standard-cell logic. | |
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ORT82G5 FPSC sponsored by Lattice Semiconductor Corp.
Description: Backplane transceivers containing eight channels, each opertaing at up to 3.125 Gbits/s, with a full-duplex synchrnous interface with built-in clock and data recovery (CDR). | |
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ORT8850H/L FPSC sponsored by Lattice Semiconductor Corp.
Description: Backplane transceivers containing eight channels, each operating at up to 850 Mbits/s (6.8 Gbits/s when all eight channels are used) full duplex synchronous interface with built-in clock and data recovery (CDR). | |
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PCI 2.2 Target IP Core sponsored by Specsoft Consulting Inc
Description: The SPCPCI2.2 Target core enables a designer to provide a PCI 2.2 compliant interface in a SoC / FPGA or as a stand-alone PCI agent with sustained high performance, while utilizing optimum number of gates. | |
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Synopsys LEDA® sponsored by Synopsys, Inc.
Description: Synopsys LEDA® is a programmable coding and design guideline checker that delivers full chip mixed-language (Verilog and VHDL) capabilities to speed development of complex system-on-chip (SoC) designs. | |
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Synopsys Library Compiler™ sponsored by Synopsys, Inc.
Description: Library Compiler provides library information including cell timing, function, power, test and physical data for optimized tool performance while meeting technology requirement. | |
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Synopsys Module Compiler sponsored by Synopsys, Inc.
Description: Module Compiler™ simplifies and automates datapath synthesis allowing users to achieve high-performance designs in a much shorter time. | |
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Synopsys NanoSim™ sponsored by Synopsys, Inc.
Description: NanoSim™ is an advanced circuit simulation solution for memory and mixed-signal verification that combines best-in-class circuit simulation technologies from existing Synopsys circuit simulators TimeMill and PowerMill. | |
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Synopsys PathMill® sponsored by Synopsys, Inc.
Description: PathMill® is the de facto standard transistor-level static-timing analysis tool targeted at designers of complex microprocessor and DSP chips. | |
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Synopsys Scirocco™ sponsored by Synopsys, Inc.
Description: Scirocco™ is a high performance, high capacity full language VHDL simulator that combines the dramatic performance potential of cycle-based technology with the flexibility of an event-driven simulator in a single unified simulation kernel. | |
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